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dc.title | Design method of integrated circuits in education | en |
dc.contributor.author | Knot, Tomáš | |
dc.contributor.author | Vlček, Karel | |
dc.relation.ispartof | Turkish Online Journal of Educational Technology | |
dc.identifier.issn | 1303-6521 Scopus Sources, Sherpa/RoMEO, JCR | |
dc.date.issued | 2015 | |
utb.relation.volume | 2015 | |
dc.citation.spage | 152 | |
dc.citation.epage | 157 | |
dc.type | article | |
dc.language.iso | en | |
dc.publisher | Sakarya University | |
dc.description.abstract | This paper deals with the Transaction Level Modelling (TLM) and Register Transfer Level (RTL). The TLM is considered as a practical design approach to the high complexity of the system design. It is highly effective especially in the implementation of hierarchically-arranged system model. This situation is typical for HW/SW Co-design. The RTL covers lower-level design techniques and it is described on a gate level using the signals. Students try to work with both approaches and also solve particular tasks in tuition materials of the Gate Fields and Advanced Architecture of Processors courses. This approach brings better overview of design methods in terms of education; therefore, they can use the same programming language (SystemC) for design of integrated circuit and a firmware of the device. © The Turkish Online Journal of Educational Technology. | en |
utb.faculty | Faculty of Applied Informatics | |
dc.identifier.uri | http://hdl.handle.net/10563/1006253 | |
utb.identifier.obdid | 43874315 | |
utb.identifier.scopus | 2-s2.0-84957582646 | |
utb.source | j-scopus | |
dc.date.accessioned | 2016-04-28T10:53:13Z | |
dc.date.available | 2016-04-28T10:53:13Z | |
utb.contributor.internalauthor | Knot, Tomáš | |
utb.contributor.internalauthor | Vlček, Karel |